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freescale semiconductor, inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. document number: mc33186 rev. 6.0, 10/2006 freescale semiconductor technical data ? freescale semiconductor, in c., 2007. all rights reserved. h-bridge driver the 33186 is a monolithic h-bridge ideal for fractional horsepower dc-motor and bi-directional thrust solenoid control. the ic incorporates internal control logi c, charge pump, gate drive, and low r ds(on) mosfet output circuitry. the 33186 is able to control continuous inductive dc load currents up to 5.0 a. output loads can be pulse width modulated (pwm-ed) at frequencies up to 10 khz. the 33186 is parametrically specif ied over a temperature range of -40 c t a 125 c, 5.0 v v+ 28 v. the ic can also be operated up to 40 v with de-rating of the specifications. the ic is available in a surface mount power package with exposed pad for heat sinking. features ? overtemperature, short-circuit protection, and overvoltage protection against transients up to 40 v at vbat typical ? rdson = 150 m ? for each output transistor at 25 c ? continuous dc load current 5 a (tc < 100 c ) ? output current limitation at typ 6,5 a +/- 20% ? short-circuit shutdown for output currents over 8 a ? logic inputs ttl/cmos compatible ? operating frequency up to 20 khz ? undervoltage disable function ? diagnostic output, 2 disable input ? coding input for alternative functions ? stable operation with an extern al capacitance of maximum 47 f at vbat ? pb-free packaging designated by suffix code vw figure 1. 33186 simplified block diagram h-bridge motor driver 33186 ordering information device temperature range (t a ) package mc33186dh1/r2 - 40c to 125c 20 hsop mc33186vw1/r2 dh suffix vw suffix (pb-free) plastic package 98ash70702a 20-pin hsop 5.0 v v pwr motor mcu or dsp out2 out1 vbat cp pgnd sf in1 di1 in2 di2 33186
analog integrated circuit device data 2 freescale semiconductor 33186 internal block diagram internal block diagram figure 2. 33186 simplifi ed internal block diagram charge-pump overcurrent high-side overcurrent current limit overtemperature current limitation logic undervoltage sf in1 in2 di1 di2 cod pgnd out2 out1 vbat cp gate control: 3-4 gate control: 1-2 internal 5v vbat vbat low-side
analog integrated circuit device data freescale semiconductor 3 33186 pin connections pin connections figure 3. 33186 pin locations table 1. 33186 pin description pin name description 9, 10, 11, 12 metal slug pgnd power ground. all the ground are connected together , they should be connected as short as possible on the pcb. 1agnd analog ground. all the ground are connected to gether, they should be c onnected as short as possible on the pcb. 2output status flag (sf) open drain output, active low. is set according to the truth table. when a fault appears, sf changes typically in less than 100 ms. 3,13 18, 19 inputs in1, in2, di1, di2, cod voltage controlled inputs with hysteresis 8cod when not connected or connected to gnd, a stored failure will be reset by change of the voltage- level on di1 or di2. when connected to vcc, the disable pin di1 and di2 are inactive. a stored failure will be reset by change of the voltage-level on in1 or in2. 6, 7, 14, 15 out1, out2 h-bridge outputs with integrated free-wheeling diodes. 1 2 3 5 4 6 7 8 9 10 1 2 3 5 4 6 7 8 9 20 1 1 1 1 1 1 1 1 1 metal slug is connected to power ground pin connections (top view) agnd sf in1 vbat vbat cod pgnd pgnd pgnd pgnd di2 out2 out2 di1 out1 out1 cp vbat in2 nc
analog integrated circuit device data 4 freescale semiconductor 33186 pin connections 4, 5, 16 vbat the pins 4 and 5 are internally connected. these pins supply the left high side and the analog/logic part of the device. the pin 16 supplies the right high side and the charge pump. the pins 4, 5 and 16 should be connected together on the printed circuit board with connections as short as possible. supervision and protection functions a) supply voltage supervision the supply voltage is supervised. if it is below its specific threshold, the power stages are switched in tristate and the status flag is switched low. if the supply voltage is over the specific thresh old again, the power stage switches independently into normal operation, according to the input pins and the status flag is reset. b) thermal supervision in case of overtemperature, the power stages are switched in tristate independent of the inputs signals and the status flag is switched low. if the level changes from high to low on di1 (in1) or low to high on di2 (in2), the output stage switches on again if the temperature is below the spec ified limit.the status-flag is reset to high level (pin names in brackets re fer to coding pin = vcc). c) supervision of overcurrent on high sides and low sides in case of over-current detection, the power stages are switched in tristate independent of the inputs signals and the status flag is set. if the level changes from high to low on di1 (in1) or low to high on di2 (in2) the output stage switches on again and the status flag is reset to hi gh level (pin names in brackets refer to coding pin = vcc). the output stage switches into the mode defined by the inputs pins provided, and/if the temperature is below the specified limits. d) current limiting on low sides the maximum current which can flow under normal ope rating conditions is limited to imax = 6,5 a +/- 20%. when the maximum current value is reached, the output stages are switched tristate for a fixed time. according to the time constant the cu rrent decreases until the next switch on occurs. see page 8 for schematics. 17 cp charge pump output pin a filtering capacitor (up to 33 nf) can be connec ted between pin 17 and gnd. device can operate without external capacitor, although pin 17 decoupli ng capacitor help in noise reduction and allows the device to perform a maximum speed, timing and pwm frequency. table 1. 33186 pin d escription(continued) pin name description
analog integrated circuit device data freescale semiconductor 5 33186 electrical characteristics maximum ratings electrical characteristics maximum ratings table 2. maximum ratings all voltages are with respect to ground unless otherwise no ted. exceeding these ratings may cause a malfunction or permanent damage to the device. ratings symbol min typ max unit electrical ratings supply voltage static destruction proof dynamic destruction proof t < 0,5 s v bat v bat - 1.0 - 2.0 ? ? 28 40 v logic inputs (in1, in2, di1, di2, code) u - 0.5 ? 7.0 v output status - flag sf u sf - 0.5 ? 7.0 v thermal ratings junction temperature t j - 40 ? +150 c storage temperature t s - 55 ? +125 c ambient temperature t a - 40 ? +125 c thermal resistance (with power applied on 2 power mos) rth jc ?? +1.5 k/w thermal resistance (with power applied on 2 power mos) rth jc ?? +1.5 k/w peak package reflow temperature during reflow (1) , (2) t pprt note 2. c notes 1. pin soldering temperature limit is for 10 seconds maximum dur ation. not designed for immersion soldering. exceeding these lim its may cause malfunction or permanent damage to the device. 2. freescale?s package reflow capability meets pb-free requirem ents for jedec standard j-std-020c. for peak package reflow temperature and moisture sensitivity levels (msl), go to www.freescale.com, search by part number [e.g. remove pr efixes/suffixes and enter the core id to view all orderable parts . (i.e. mc33xxxd enter 33xxx), and review parametrics.
analog integrated circuit device data 6 freescale semiconductor 33186 electrical characteristics static electrical characteristics static electrical characteristics table 3. static electrical characteristics characteristic noted under conditions -40 c to +125 c, vbat from 5 v to 28 v, unless ot herwise note. typical values reflect approximate mean at 25 c, nominal vcc, at time of device characterization. characteristics symbol min typ max unit power supply operating range: static dynamic (t < 500 ms) v bat v bat 5.0 ? ? ? 28 40 v v stand-by current f = 0 to 10 khz; iout = 0 a i v bat ? ?35 ma vbat-undervoltage switch-off (without load) switch-off voltage switch-on voltage hysteresis 4.15 4.5 150 4.4 4.75 ? 4.65 5.0 ? v v mv charge-pump supply vbat = 4.15 v vbat < 40 v v cp - v bat v cp - v bat 3.35 ? ? ? ? 20 v v logic inputs input high vinh 3.4 ? ? v input low vinl ? ? 1.4 v input hysteresis u0.71.0?v input pull up current (in1, in2, di1) uin = 0.0 v i - 200 - 80 ? a input pull down current (di2,cod) (3) udi2 = 5.0 v i di2 ? 25 100 a power outputs: out1, out2 switch on resistance: r out - vbat ; r out - gnd vbat = 5 to 28 v; ccp = 0 to 33 nf ? ? 300 m ? switch-off current during current limitation on low sides (i out ) max 5.2 6.5 7.8 a switch-off time during current limitation on low sides t a 15 20.5 26 s blanking time during current limitation on low sides t b 12 16.5 21 s notes 3. in case of negative voltage at out2 (respectively out1) this maximum pull down current at di2 (respectively cod) pin can be exceeded. this happens during recirculation when the cu rrent is flowing in the low side. see curve 22.
analog integrated circuit device data freescale semiconductor 7 33186 electrical characteristics static electrical characteristics high side overcurrent detection (4) low side overcurrent detection i ochs i ocls 11 8.0 ? ? ? ? a leakage current output stage switched off ? ? 100 a free-wheeling diode forward voltage iou = 3.0 a u d ??2.0 v free-wheeling diode reverse recovery time ifm =1.0 a, di/dt = 4.0 a/s t rr ?2.05.0 s switch-off temperature hysteresis 160 20 ? ? 190 30 c c output status flag (open drain output) output high (sf not set) usf = 5.0 v i sf ? ?10 a output low (sf set) isf = 300 a vsf ? ? 1.0 v timing pwm frequency ccp = 33 nf f??10khz maximum switching frequency during current limitation vbat = 6....28 v.....c cp = 33 nf f??20khz output on delay in1 ..... > out1 or in2 ..... > out2 t don ??15 s output off delay in1 ..... > out1 or in2 ..... > out2 t doff ??15 s output switching time ccp = 0 to 33 nf outih ..... outil, outil ..... outih, iout = 3.0 a t r , t f 2.0 ? 5.0 s disable delay time dii ..... outi t ddis ??8.0 s turn off in case of overcurrent or overtemperature ?4.0 8.0 s power on delay time (ccp = 33 nf) (5) ?1.05.0 ms notes 4. in case of overcurrent, the time when the current is greater than 7.8 a is lower than 30 s, with a maximum frequency of 1 khz. 5. this parameter corresponds to the time for ccp to reach its nominal value when vbat is applied. table 3. static electric al characteristics(continued) characteristic noted under conditions -40 c to +125 c, vbat from 5 v to 28 v, unless ot herwise note. typical values reflect approximate mean at 25 c, nominal vcc, at time of device characterization. characteristics symbol min typ max unit
analog integrated circuit device data 8 freescale semiconductor 33186 electrical characteristics truth table truth table table 4. truth table device state input conditions status outputs di1 (8) di2 (8) in1 in2 sf (9) sf (10) ou1 ou2 1-forward lhhlhh h l 2-reverse lhlhhh l h 3-free wheeling low lhllhh l l 4-free wheeling high lhhhhh h h 5-disable 1 hxxxlh z z 6-disable 2 xlxxlh z z 7-in1 disconnected lhzxhh h x 8-in2 disconnected lhxzhh x h 9-di1 disconnected zxxxlh z z 10-di2 disconnected xzxxlh z z 11-current limit.active lhxxhh z z 12-undervoltage (6) xxxxll z z 13-overtemperature (7) xxxxll z z 14-overcurrent (7) xxxxll z z notes 6. in case of undervoltage, tristate and status-flag are reset automatically. 7. whenever overcurrent or overtemperature is detected, the fault is stored (i.e.status-flag rema ins low). the tristate conditio ns and the status-flag are reset via di1 (in1) or di2 (in2). pin names in brackets refer to coding pin ( cod = vcc ). 8. if cod = vcc then di1 and di2 are not active. 9. cod = nc or gnd 10. cod = vcc l = low h = high x = high or low z = high impedance (all output stage transistors are switched off).
analog integrated circuit device data freescale semiconductor 9 33186 electrical characteristics figure 4. typical application figure 5. output delay time m micro controller 10k voltage 47f vbat regulator vcc ccp=33nf vbat cp in1 sf power ground out1 out2 in2 di1 cod di2 gnd power ground 50% 50% 90% 10% t don t doff inn oun
analog integrated circuit device data 10 freescale semiconductor 33186 electrical characteristics figure 6. disable delay time figure 7. output switching time 10% 50% t ddis z din oun 90% 10% 90% 10% tf tr oun
analog integrated circuit device data freescale semiconductor 11 33186 electrical characteristics figure 8. current limitation on low side > 8a overturned a load- current typ 6.5a control signal status flag 6.5a overcurrent detection t a t b detail a t a = switch-off time in current limitation t b = current limitation blanking time
analog integrated circuit device data 12 freescale semiconductor 33186 electrical characteristics figure 9. stand-by current vs. temperature figure 10. vbat undervoltage vs. temperature figure 11. low threshold input voltage vs. temperature figure 12. high threshold input voltage vs. temperature figure 13. vcp vs. battery voltage figure 14. rdson vs. temperature 10,5 11 t, temperature ( c) ivbat (ma) -50 0 25 100 -25 50 75 125 11,5 12 12,5 13,5 10 9,5 9 vbat=12v 13 4,60 4,70 t, temperature ( c) vbat(v) -50 0 25 100 -25 50 75 125 4,80 4,90 5,00 4,50 4,40 4,30 4,20 switch off voltage switch on voltage 1,83 1,84 t, temperature ( c) vi n l (v) -50 0 25 100 -25 50 75 125 1,85 1,86 1,87 1,88 1,82 1,81 1,89 t, temperature ( c) vinh (v) -50 0 25 100 -25 50 75 125 2,77 2,78 2,79 2,80 2,81 2,82 2,76 2,75 2,83 battery voltage (v) vcp (v) 0 10 15 30 5202535 15 20 25 30 35 45 10 5 0 40 tambient=25c without ccp t, temperature ( c) rdson (m ? ) 150 160 -50 0 25 100 -25 50 75 125 170 180 190 140 130 120 200 vbat=5v without ccp 110
analog integrated circuit device data freescale semiconductor 13 33186 electrical characteristics figure 15. switch off current vs. temperature figure 16. overcurrent detection vs. temperature figure 17. current limitation figure 18. switch off time figure 19. output switching time: tr figure 20. output switching time: tf t, temperature ( c) iout max (a) 6,70 6,80 -50 0 25 100 -25 50 75 125 6,90 7,00 7,10 6,30 6,60 6,50 6,40 7,20 t, temperature ( c) 14,50 15,00 -50 0 25 100 -25 50 75 125 15,50 16,00 16,50 17,50 14,00 13,50 13,00 17,00 high side switch iochs (a) imotor (1a/div) i(out) max= 7a imotor (1a/div) out1 (5v/div) out2 (5v/div) ta=20.5s out1 (5v/div) tr=3.7s out1 (5v/div) tf=2.6s
analog integrated circuit device data 14 freescale semiconductor 33186 electrical characteristics figure 21. output off delay figure 22. output on delay figure 23. disable delay time figure 24. high side overcurrent high side detection figure 25. maximum di2 inpu t current vs. iout2, current out1 (2v/div) in1 (1v/div) tdoff=12.5s out1 (2v/div) in1 (1v/div) tdon=5.8s di2 (1v/div) out1 (2v/div) tdiss=0.9s i(5a/div) iochs= 16a 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 i out2 (a) note: current through internal recirculation diode, @125c in case of negative voltage at out2
analog integrated circuit device data freescale semiconductor 15 33186 packaging soldering packaging soldering the 20 hsop package is designed for enhanced thermal performance. the particularity of this package is its copper base plate on which the power die is soldered. the base plate is soldered on a pcb to provide heat flow to the ambient and also to provide a large thermal capacitance. of course, the more copper area on the pcb, the better the power dissipation and transient behavior. we characterized the 20 hsop on a double side pcb. the bottom side area of the copper is 7.8 cm 2 . the top surface is 2.7 cm 2 , see figure 26 . figure 26. pcb test layout figure 27. phsop20 thermal response figure 27 shows the thermal response with the device soldered on to the test pcb described on figure 26 . top side bottom side 0,1 1 10 100 0,001 0,01 0,1 1 10 100 1000 10000 t, time (s) rth (c/w)
analog integrated circuit device data 16 freescale semiconductor 33186 packaging package dimensions package dimensions important: for the most current revisi on of the package, visit www.freescale.com and perform a keyword search on the 98a number listed below. case 979c?02 issue a date 07/22/98 seating plane datum plane bottom view a x 45 e1 e d h e 18x b m bbb c 20 11 10 1 e2 notes: 1. controlling dimension: millimeter. 2. dimensions and tolerances per asme y14.5m, 1994. 3. datum plane ?h? is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. dimensions d and e1 do not include mold protrusion. allowable protrusion is 0.150 per side. dimensions d and e1 do include mold mismatch and are determined at datum plane ?h?. 5. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.127 total in excess of the b dimension at maximum material condition. 6. datums ?a? and ?b? to be determined at datum plane ?h?. 7. dimension d does not include tiebar protrusions. allowable tiebar protrusions are 0.150 per side. d2 d1 e3 ??? ??? a m aaa c exposed heatsink area a b c h pin one id 10x y gauge plane detail y (1.600) l w w bbb c l1 a1 a3 dim min max millimeters a 3.000 3.400 a1 0.100 0.300 a2 2.900 3.100 a3 0.00 0.100 d 15.800 16.000 d1 11.700 12.600 d2 0.900 1.100 e 13.950 14.450 e1 10.900 11.100 e2 2.500 2.700 e3 6.400 7.200 e4 2.700 2.900 l 0.840 1.100 l1 0.350 bsc b 0.400 0.520 b1 0.400 0.482 c 0.230 0.320 c1 0.230 0.280 e 1.270 bsc h ??? 1.100 0 8 aaa 0.200 bbb 0.100 e/2 dh1 suffix vw1 suffix (pb-free) 20-pin hsop plastic package 98ash70702a issue a
analog integrated circuit device data freescale semiconductor 17 33186 additional documentation thermal addendum (rev 2.0) additional documentation thermal addendum (rev 2.0) introduction this thermal addendum is provided as a supplement to the mc33186 technical datasheet. the addendum provi des thermal performance information that may be critical in the design and development of system appl ications. all electrical, application, and packaging information is provided in the datasheet. package and thermal considerations the mc33186 is offered in a 20 pin hsop exposed pad, single die package. there is a single heat source (p), a single junction temperature (t j ), and thermal resistance (r ja ). the stated values are solely for a thermal performance comparison of one package to another in a standardized environment. this methodology is not meant to and will not predict the perfor mance of a package in an application- specific environment. stated values were obtained by measurement and simulation according to the standards listed below. 20-pin hsop-ep 33186dw 33186vw dh suffix vw suffix (pb-free) 98ash70273a 20-pin hsop-ep note for package dimensions, refer to the 33186 data sheet. t j = r ja . p standards notes: 1. per jedec jesd51-2 at natural convection, stil l air condition. 2. 2s2p thermal test board per jedec jesd51-5 and jesd51-7. 3. per jedec jesd51-8, with the board temperature on the center trace near the center lead. 4. single layer thermal test board per jedec jesd51-3 and jesd51-5. 5. thermal resistance between the die junction and the exposed pad surface; cold plate attached to the package bottom side, remaining surfaces insulated. figure 28. thermal land pattern for direct thermal attachment according to jesd51-5 table 5. thermal performance comparison thermal resistance [ c/w] r ja (1) , (2) 29 r jb (2) , (3) 9.0 r ja (1) , (4) 69 r jc (5) 2.0 1.0 1.0 0.2 0.2 * all measurements are in millimeters soldermast openings thermal vias connected to top buried plane 20 pin hsop-ep 1.6 mm pitch 16.0 mm x 11.0 mm body 12.3 mm x 7.1 mm exposed pad
analog integrated circuit device data 18 freescale semiconductor 33186 additional documentation thermal addendum (rev 2.0) figure 29. thermal test board device on thermal test board table 6. thermal resistance performance r ja is the thermal resistance between die junction and ambient air. a 33186dh1 pin connections 20-pin hsop-ep 1.6 mm pitch 16.0 mm x 11.0 mm body 12.3 x 7.1 mm exposed pad nc agnd in2 di1 cp vbat out2 out2 di2 pgnd pgnd sf vbat out1 out1 cod pgnd pgnd in1 vbat 1 2 3 4 5 6 7 8 9 10 20 19 16 15 14 13 12 11 18 17 material: single layer printed circuit board fr4, 1.6 mm thickness cu traces, 0.07 mm thickness outline: 80 mm x 100 mm board area, including edge connector for thermal testing area a: cu heat-spreading areas on board surface ambient conditions: natural convection, still air a [mm 2 ]r ja [ c/w] 070 300 49 600 47
analog integrated circuit device data freescale semiconductor 19 33186 additional documentation thermal addendum (rev 2.0) figure 30. device on thermal test board r ja figure 31. transient thermal resistance r ja 1 w step response, device on thermal test board area a = 600 (mm 2 ) 0 10 20 30 40 50 60 70 80 heat spreading area a [mm2] thermal resistance [oc/w ] 0 300 600 r ja [ c/w] x heat spreading area a [mm 2 ] 0 300 600 thermal resistance [ c/w] 80 70 60 50 40 30 20 10 0 0.1 1 10 100 1.00e-03 1.00e-02 1.00e-01 1.00e+00 1.00e+01 1.00e+02 1.00e+03 1.00e+04 time[s] thermal resistance [oc/w] r ja [ c/w] x thermal resistance [ c/w] 100 10 1 0.1 time [s] 1.00e+04 1.00e+03 1.00e+02 1.00e+01 1.00e+00 1.00e-01 1.00e-02 1.00e-03
analog integrated circuit device data 20 freescale semiconductor 33186 revision history revision history revision date description of changes 5.0 5/2006 ? implemented revision history page ? added lead free (pb-free) part number mc33186vw1 6.0 10/2006 ? updated data sheet formal ? removed peak package reflow temperature during reflow (solder reflow) parameter from maximum ratings on page 5 . added note with instructions to obtain this information from www.freescale.com .
mc33186 rev. 6.0 10/2006 information in this document is provided solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability ar ising out of the application or use of any product or circuit, and specifically discl aims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale se miconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the fa ilure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc., 2007. all rights reserved. rohs-compliant and/or pb-free versions of freescale products have the functionality and electrical characteristics of thei r non-rohs-compliant and/or non-pb-free counterparts. for further information, see http://www.freescale.com or contact your freescale sales representative. for information on freescale?s environmental products program, go to http:// www.freescale.com/epp . how to reach us: home page: www.freescale.com web support: http://www.freescale.com/support usa/europe or locations not listed: freescale semiconductor, inc. technical information center, el516 2100 east elliot road tempe, arizona 85284 +1-800-521-6274 or +1-480-768-2130 www.freescale.com/support europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) www.freescale.com/support japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor hong kong ltd. technical information center 2 dai king street tai po industrial estate tai po, n.t., hong kong +800 2666 8080 support.asia@freescale.com for literature requests only: freescale semiconductor literature distribution center p.o. box 5405 denver, colorado 80217 1-800-441-2447 or 303-675-2140 fax: 303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com

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